SherbyNet - /page/wikibook/entry.mu

Micron Document

<!DOCTYPE html>

<title>VLSI Project</title>

</head>

<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">VLSI Project</span></span>

</h1>

</header>

/* start https://en.wikipedia.org/ */

.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}

/* end https://en.wikipedia.org/ */

</style>

<p>The <b>VLSI Project</b> was a <a href="DARPA" title="DARPA">DARPA</a>-program initiated by <a href="Bob_Kahn" class="mw-redirect" title="Bob Kahn">Robert Kahn</a> in 1978<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> that provided research funding to a wide variety of <a href="University" title="University">university</a>-based teams in an effort to improve the <a href="State_of_the_art" title="State of the art">state of the art</a> in <a href="Microprocessor" title="Microprocessor">microprocessor</a> design, then known as <a href="Very_Large_Scale_Integration" class="mw-redirect" title="Very Large Scale Integration">Very Large Scale Integration</a> (VLSI).

</p><p>The VLSI Project is one of the most influential research projects in modern computer history. Its offspring include <a href="Berkeley_Software_Distribution" title="Berkeley Software Distribution">Berkeley Software Distribution</a> (BSD) <a href="Unix" title="Unix">Unix</a>, the <a href="Reduced_instruction_set_computer" title="Reduced instruction set computer">reduced instruction set computer</a> (RISC) processor concept, many <a href="Computer-aided_design" title="Computer-aided design">computer-aided design</a> (CAD) tools still in use today, <a href="32-bit" class="mw-redirect" title="32-bit">32-bit</a> graphics <a href="Workstation" title="Workstation">workstations</a>, <a href="Fabless_manufacturing" title="Fabless manufacturing">fabless manufacturing</a> and design houses, and its own <a href="Semiconductor_fabrication_plant" title="Semiconductor fabrication plant">semiconductor fabrication plant</a> (fab), <a href="MOSIS" title="MOSIS">MOSIS</a>, starting in 1981.<sup id="cite_ref-Pina2002_2-0" class="reference"><a href="#cite_note-Pina2002-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> A similar DARPA project partnering with industry, <a href="VHSIC" class="mw-redirect" title="VHSIC">VHSIC</a> had little or no impact.

</p><p>The VLSI Project was central in promoting the <a href="Mead_and_Conway_revolution" class="mw-redirect" title="Mead and Conway revolution">Mead and Conway revolution</a> throughout industry.

</p>

<div class="mw-heading mw-heading2"><h2 id="Project">Project</h2></div>

<div class="mw-heading mw-heading3"><h3 id="New_design_rules">New design rules</h3></div>

<p>In 1975, <a href="Carver_Mead" title="Carver Mead">Carver Mead</a>, <a href="Thomas_Eugene_Everhart" title="Thomas Eugene Everhart">Tom Everhart</a> and <a href="Ivan_Sutherland" title="Ivan Sutherland">Ivan Sutherland</a> of <a href="Caltech" class="mw-redirect" title="Caltech">Caltech</a> wrote a report for <a href="Advanced_Research_Projects_Agency" class="mw-redirect" title="Advanced Research Projects Agency">ARPA</a> on the topic of microelectronics. Over the previous few years, Mead had coined the term "<a href="Moore's_law" title="Moore's law">Moore's law</a>" to describe <a href="Gordon_Moore" title="Gordon Moore">Gordon Moore</a>'s 1965 prediction for the growth rate of complexity, and in 1974, <a href="Robert_Dennard" class="mw-redirect" title="Robert Dennard">Robert Dennard</a> of <a href="IBM" title="IBM">IBM</a> noted that the scale shrinking that formed the basis of Moore's law also affected the performance of the systems. These combined effects implied a massive increase in computing power was about to be unleashed on the industry.<sup id="cite_ref-FOOTNOTEConway20125_3-0" class="reference"><a href="#cite_note-FOOTNOTEConway20125-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> The report, published in 1976, suggested that ARPA fund development across a number of fields in order to deal with the complexity that was about to appear due to these "very-large-scale integrated circuits".<sup id="cite_ref-FOOTNOTEConway20126_4-0" class="reference"><a href="#cite_note-FOOTNOTEConway20126-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup>

</p><p>Later that year, Sutherland wrote a letter to his brother Bert who was at that time working at <a href="Xerox_PARC" class="mw-redirect" title="Xerox PARC">Xerox PARC</a>. He suggested a joint effort between PARC and Caltech to begin studying these issues. Bert agreed to form a team, inviting <a href="Lynn_Conway" title="Lynn Conway">Lynn Conway</a> and Doug Fairbairn to join. Conway had previously worked at IBM on a supercomputer project known as <a href="IBM_Advanced_Computer_Systems_project" title="IBM Advanced Computer Systems project">ACS-1</a>. After considering the notes from Mead, Conway realized that the rapid scaling of <a href="CMOS" title="CMOS">CMOS</a> being predicted would allow it to surpass the otherwise faster <a href="Emitter-coupled_logic" title="Emitter-coupled logic">ECL</a> systems used on larger systems as the feature sizes shrank and Dennard's speed predictions kicked in. It also implied that the entire ACS-1 mainframe would one day fit on a single chip.<sup id="cite_ref-FOOTNOTEConway20126_4-1" class="reference"><a href="#cite_note-FOOTNOTEConway20126-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> In 1976, Sutherland and Mead wrote an article in <i><a href="Scientific_American" title="Scientific American">Scientific American</a></i> on the challenges presented by the new complexity.<sup id="cite_ref-FOOTNOTEConway20127_5-0" class="reference"><a href="#cite_note-FOOTNOTEConway20127-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>

</p><p>At the time, microprocessor design was plateauing at the 100,000 <a href="Transistor" title="Transistor">transistor</a> level because the tools available to the designers were simply unable to deal with more complex designs. <a href="16-bit" class="mw-redirect" title="16-bit">16-bit</a> and 16/32-bit designs were coming to market, but beyond that seemed too difficult and expensive to contemplate. Mead and Conway felt that there was no theoretical problem impeding progress, simply a number of practical ones, and set about solving these in order to make much more complex designs possible. Simply put, the solution was to simplify everything, inventing new practical rules-of-thumb for designers and applying computers to the problems that were larger.<sup id="cite_ref-FOOTNOTEConway20127_5-1" class="reference"><a href="#cite_note-FOOTNOTEConway20127-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> This process was aided by the recent introduction of depletion mode <a href="NMOS_logic" title="NMOS logic">NMOS logic</a>, which greatly simplified the conceptual model of the active elements.<sup id="cite_ref-FOOTNOTEConway20128_6-0" class="reference"><a href="#cite_note-FOOTNOTEConway20128-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>

</p><p>The mid-1970s were a period of rapid change as new processes were being introduced at different companies at a rapid pace. Each new process led to a set of design rules that often ran to 40 pages. These would include details like "do not place to parallel lines on the metallization layer (MET) that are closer than 2 micrometers apart". Dozens of such rules were developed for each layer to squeeze out maximum performance. In early 1977, Conway began developing a new set of completely generic rules. These would not offer the highest performance possible for any given system, but her concept was that it would so greatly reduce design time that it could be adapted to a new underling fabrication technology with little or no changes, and such a move would offer many times the performance benefit that using every published trick of the existing rules would.<sup id="cite_ref-FOOTNOTEConway20128_6-1" class="reference"><a href="#cite_note-FOOTNOTEConway20128-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>

</p><p>Starting with three colored whiteboard pens representing each of the types of layers, MET, POLY, DIFF, Conway developed a set of design rules that worked on every current process. Further development led to the realization that all of the dimensions could be expressed as multiples of some fundamental minimum feature size possible using that process, which became known as λ (the Greek letter lambda). λ was set to be one half of the minimum width of a line of POLY or DIFF, and the rules expressed in those terms; "a line has to be two λ wide", "two lines on the same layer must be at least three λ apart", "lines on different layers must be one λ apart" and so forth. The end result was a short set of design rules that applied at any scale. Conway later noted "I vividly recall seeing Mead's jaw drop that spring morning in 1977 as I presented my strategy for λ-based rules on my whiteboard at PARC."<sup id="cite_ref-FOOTNOTEConway201210_7-0" class="reference"><a href="#cite_note-FOOTNOTEConway201210-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Internet_based_process">Internet based process</h3></div>

<p>One of the primary efforts under VLSI was the creation of the hardware and software needed to automate the design process, which at that point was still largely manual. For a design containing hundreds of thousands of transistors, there was simply no machine short of a <a href="Supercomputer" title="Supercomputer">supercomputer</a> that had the memory and performance needed to work on the design as a whole.

</p><p>To address this problem, and thereby allow "average" companies to use automated tools, VLSI funded the <b>Geometry Engine</b> and <b>Pixel-Planes</b> projects at <a href="Stanford_University" title="Stanford University">Stanford University</a> and <a href="University_of_North_Carolina_at_Chapel_Hill" title="University of North Carolina at Chapel Hill">University of North Carolina at Chapel Hill</a> (respectively) to create suitable graphics hardware at the desktop level. The former evolved into an effort to design a networked CAD workstation, known as the <b>Stanford University Network</b>. This is better known today under its <a href="Acronym" title="Acronym">acronym</a>, "SUN", as in <a href="Sun_Microsystems" title="Sun Microsystems">Sun Microsystems</a>, which commercialized the design.

</p><p>To provide a common <i>software</i> platform to run these new tools, VLSI also funded a Berkeley project to provide a standardized <a href="Unix" title="Unix">Unix</a> implementation, known today as the <a href="Berkeley_Software_Distribution" title="Berkeley Software Distribution">Berkeley Software Distribution</a> (BSD). Almost all early workstations used BSD, including designs that evolved into Sun, <a href="Silicon_Graphics" title="Silicon Graphics">SGI</a>, <a href="Apollo_Computer" title="Apollo Computer">Apollo Computer</a>, and others. BSD later spawned several descendants, <a href="OpenBSD" title="OpenBSD">OpenBSD</a>, <a href="FreeBSD" title="FreeBSD">FreeBSD</a>, <a href="NetBSD" title="NetBSD">NetBSD</a>, and <a href="DragonFlyBSD" class="mw-redirect" title="DragonFlyBSD">DragonFlyBSD</a>.

</p><p>CAD software was an important part of the VLSI effort. This led to major improvements in CAD technology for layout, design rule checking, and simulation. The tools developed in this program were used extensively in both academic research programs and in industry. The ideas were developed in commercial implementations by companies such as <a href="VLSI_Technology" title="VLSI Technology">VLSI Technology</a>, Cadnetix, and Synopsis.

</p><p>With these tools in hand, other VLSI funded projects were able to make huge strides in design complexity, sparking off the RISC revolution. The two major VLSI-related projects were <a href="Berkeley_RISC" title="Berkeley RISC">Berkeley RISC</a> and <a href="Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a>, both of which relied heavily on the tools developed in previous VLSI projects. To allow design teams to produce test examples, the project also funded the building of their own fabrication facility, <b>MOSIS</b> (<i>Metal Oxide Semiconductor Implementation Service</i>), which received plans electronically. <a href="MOSIS" title="MOSIS">MOSIS</a> remains in operation today.

</p><p>Another important part of the MOSIS fabrication process was the development of the <b>multichip wafer</b>, which allowed a single wafer of silicon to be used to produce several chip designs at the same time. Previously a wafer would normally be used to produce a single design, which meant that there was a definite minimum production run one could consider starting up. In contrast, the multichip wafer a small batch of a chip design could be produced in the middle of a larger run, dramatically lowering the startup cost and prototyping stage.

</p>

<div class="mw-heading mw-heading2"><h2 id="Investigators">Investigators</h2></div>

<ul><li><a href="David_Patterson_(computer_scientist)" title="David Patterson (computer scientist)">David Patterson</a>, <a href="Berkeley_RISC" title="Berkeley RISC">Berkeley_RISC</a> RISC I and II</li>

<li><a href="John_L._Hennessy" title="John L. Hennessy">John L. Hennessy</a>, <a href="MIPS_architecture" title="MIPS architecture">MIPS architecture</a></li>

<li><a href="Danny_Hillis" title="Danny Hillis">Danny Hillis</a>, <a href="Connection_Machine" title="Connection Machine">Connection Machine</a></li>

<li>Charles Seitz, <a href="Caltech_Cosmic_Cube" title="Caltech Cosmic Cube">Cosmic Cube</a></li>

<li><a href="James_H._Clark" title="James H. Clark">Jim Clark</a>, <a href="Geometry_Engine" class="mw-redirect" title="Geometry Engine">Geometry Engine</a></li>

<li><a href="Forest_Baskett" title="Forest Baskett">Forest Baskett</a>, <a href="Sun_Microsystems" title="Sun Microsystems">SUN</a> networking</li>

<li><a href="John_Ousterhout" title="John Ousterhout">John Ousterhout</a>, Caesar and <a href="Magic_(software)" title="Magic (software)">Magic design tools</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Direct_outcomes_of_the_VLSI_Project">Direct outcomes of the VLSI Project</h2></div>

<ul><li><a href="Sun-1" title="Sun-1">Sun-1</a> was an offshoot of the Stanford <a href="SUN_workstation" title="SUN workstation">SUN workstation project</a></li>

<li><a href="Silicon_Graphics" title="Silicon Graphics">Silicon Graphics</a>'s workstation design was based on the <a href="Geometry_pipelines" title="Geometry pipelines">Geometry Engine concept</a></li>

<li>UNC's Pixel-Planes, PixelFlow and WarpEngine series of <a href="Parallel_processor" class="mw-redirect" title="Parallel processor">parallel processor</a> graphics <a href="Workstation" title="Workstation">workstations</a></li>

<li><a href="Berkeley_RISC" title="Berkeley RISC">Berkeley RISC</a> turned into <a href="SPARC" title="SPARC">SPARC</a> at <a href="Sun_Microsystems" title="Sun Microsystems">Sun Microsystems</a></li>

<li><a href="Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a> are used in many embedded applications such as <a href="Set-top_box" title="Set-top box">set-top boxes</a></li>

<li><a href="Berkeley_Software_Distribution" title="Berkeley Software Distribution">BSD Unix</a> and its derivatives remain a popular system</li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

/* start https://en.wikipedia.org/ */

.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}

/* end https://en.wikipedia.org/ */

</style><div class="reflist">

/* start https://en.wikipedia.org/ */

.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("./mw/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("./mw/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("./mw/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("./mw/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}

/* end https://en.wikipedia.org/ */

</style><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://www.nap.edu/download/6323"><i>Funding a Revolution: Government Support for Computing Research</i></a>. National Academy Press. 1999. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.17226%2F6323">10.17226/6323</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-0-309-06278-7</bdi><span class="reference-accessdate">. Retrieved <span class="nowrap">17 September</span> 2020</span>. <q>DARPA's VLSI program built upon these early efforts. Formally initiated by Robert Kahn in 1978, the DARPA program grew out of a study it commissioned at RAND Corporation in 1976 to evaluate the scope of research DARPA might support in VLSI (Sutherland, 1976).</q></cite></span>

</li>

<li id="cite_note-Pina2002-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-Pina2002_2-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFPina2002" class="citation book cs1">Pina, C. A. (7 August 2002). <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/994612">"Evolution of the MOSIS VLSI educational program"</a>. <i>Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002</i>. pp. <span class="nowrap">187–</span>191. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FDELTA.2002.994612">10.1109/DELTA.2002.994612</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-7695-1453-7</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:35695273">35695273</a><span class="reference-accessdate">. Retrieved <span class="nowrap">17 September</span> 2020</span>. <q>MOSIS was started in 1981 by the U.S. Defense Advanced Research Program Agency</q></cite></span>

</li>

<li id="cite_note-FOOTNOTEConway20125-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-FOOTNOTEConway20125_3-0">^</a></b></span> <span class="reference-text"><a href="#CITEREFConway2012">Conway 2012</a>, p. 5.</span>

</li>

<li id="cite_note-FOOTNOTEConway20126-4"><span class="mw-cite-backlink">^ <a href="#cite_ref-FOOTNOTEConway20126_4-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-FOOTNOTEConway20126_4-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a href="#CITEREFConway2012">Conway 2012</a>, p. 6.</span>

</li>

<li id="cite_note-FOOTNOTEConway20127-5"><span class="mw-cite-backlink">^ <a href="#cite_ref-FOOTNOTEConway20127_5-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-FOOTNOTEConway20127_5-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a href="#CITEREFConway2012">Conway 2012</a>, p. 7.</span>

</li>

<li id="cite_note-FOOTNOTEConway20128-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-FOOTNOTEConway20128_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-FOOTNOTEConway20128_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a href="#CITEREFConway2012">Conway 2012</a>, p. 8.</span>

</li>

<li id="cite_note-FOOTNOTEConway201210-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-FOOTNOTEConway201210_7-0">^</a></b></span> <span class="reference-text"><a href="#CITEREFConway2012">Conway 2012</a>, p. 10.</span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading3"><h3 id="Bibliography">Bibliography</h3></div>

<ul><li><cite id="CITEREFConway2012" class="citation journal cs1">Conway, Lynn (Fall 2012). <a rel="nofollow" class="external text" href="http://worrydream.com/refs/Conway%20-%20Reminiscences%20of%20the%20VLSI%20Revolution.pdf">"Reminiscences of the VLSI Revolution"</a> <span class="cs1-format">(PDF)</span>. <i>IEEE Solid-State Circuits Magazine</i>. <b>4</b> (44): <span class="nowrap">8–</span>31. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FMSSC.2012.2215752">10.1109/MSSC.2012.2215752</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:9286356">9286356</a>.</cite></li></ul>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><cite id="CITEREFNational_Research_Council1995" class="citation book cs1">National Research Council (1995). <a rel="nofollow" class="external text" href="https://nap.nationalacademies.org/read/4948/chapter/3#19">"Box 1.2 An example of a Successful Federal R&D Program: The ARPA VLSI Program"</a>. <i>Evolving the High Performance Computing and Communications Initiative to Support the Nation's Information Infrastructure</i>. National Academies Press. p. 19. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.17226%2F4948">10.17226/4948</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-0-309-05277-1</bdi>.</cite></li>

<li><cite id="CITEREFClark1982" class="citation journal cs1">Clark, James (July 1982). <a rel="nofollow" class="external text" href="https://dl.acm.org/doi/pdf/10.1145/965145.801272">"The Geometry Engine: A VLSI Geometry System for Graphics"</a>. <i>Computer Graphics</i>. <b>16</b> (3): <span class="nowrap">127–</span>133. <a href="CiteSeerX_(identifier)" class="mw-redirect" title="CiteSeerX (identifier)">CiteSeerX</a> <span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.359.8519">10.1.1.359.8519</a></span>. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1145%2F965145.801272">10.1145/965145.801272</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:10223583">10223583</a>.</cite></li>

<li><a rel="nofollow" class="external text" href="http://www.cs.unc.edu/~pxfl/">The Pixel-Planes Group</a></li></ul></div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-06-23" href="https://en.wikipedia.org/wiki/?title=VLSI_Project&oldid=1296968633">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

</div>

</div></div>

</div>

</main>

</div>

</body></html>